发明名称 Bang-bang architecture
摘要 In one embodiment, the present invention includes an apparatus having a voltage controlled oscillator (VCO) to generate a first clock signal having a frequency controlled by a bias current coupling ratio of first and second bias currents, and a control circuit coupled to the VCO to generate a first pair of control signals to adjust the bias current coupling ratio. Other embodiments are described and claimed.
申请公布号 US7612625(B2) 申请公布日期 2009.11.03
申请号 US20080070440 申请日期 2008.02.19
申请人 INTEL CORPORATION 发明人 GAO MIAOBIN;HSUEH YU-LI;LIU CHIEN-CHANG
分类号 H03B5/12;H03B27/00;H03L7/099 主分类号 H03B5/12
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