| 摘要 |
Variable length decoding of DCT coefficients in MPEG video data is performed using a standard processor (400) and a small look-up table (LUT 530). The processor performs (520) an integer to floating point conversion on a portion the received bitstream (BS). By this step, lengthy codewords with many leading zeros, which are common in the codebook, are represented in a compressed form by the exponent and mantissa fields (EXP, MAN) of the floating point result (FP). The relevant bits are extracted and used as an index (IX) to address the LUT. This avoids cumbersome bit-oriented logic, while also avoiding a very large LUT that would otherwise be required to represent the same codebook. The entire LUT may thus reside in cache memory (410). In a VLIW processor implementation, decoding of one token is pipelined with the inverse scan and inverse quantisation step of the preceding token(s). |
