发明名称 |
Reducing resistivity in interconnect structures by forming an inter-layer |
摘要 |
An integrated circuit structure having improved resistivity and a method for forming the same are provided. The integrated circuit structure includes a dielectric layer, an opening in the dielectric layer, and a damascene structure in the opening. The damascene structure includes a metallic barrier layer in the opening and in physical contact with the dielectric layer, a conductive material filling the remaining part of the opening, and an interlayer between and adjoining the metallic barrier layer and the conductive material. The interlayer is preferably a metal compound layer.
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申请公布号 |
US7612451(B2) |
申请公布日期 |
2009.11.03 |
申请号 |
US20060486893 |
申请日期 |
2006.07.13 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
SHIH CHIH-CHAO;HUANG CHENG-LIN;HSIEH CHING-HUA;SHUE SHAU-LIN |
分类号 |
H01L23/48;H01L23/52;H01L29/40 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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