发明名称 CHARGING/DISCHARGING CIRCUIT AND BINARIZING CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a charging/discharging circuit and a binarizing circuit, capable of keeping the amplitude of an input signal compared to a binary threshold value constant even in demodulating an ASK (amplitude shift keying) signal using RSSI (received signal strength indicator). <P>SOLUTION: An ASK signal demodulated by an RSSI detector 17 is inputted into a peak hold circuit 23, the peak hold circuit 23 detects a peak value of an input signal inputted into a charging/discharging section 24, a clip circuit 22 clips a level not higher than a given value, from the peak value of the input signal inputted into the charging/discharging section 24, and the charging/discharging section 24 rapidly charges and discharges a capacitor C2 using the signal clipped in the clip circuit 22, thereby generating a reference voltage Vref used as a threshold value of a comparator 27. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009253306(A) 申请公布日期 2009.10.29
申请号 JP20080094599 申请日期 2008.04.01
申请人 TOSHIBA CORP;TOSHIBA INFORMATION SYSTEMS (JAPAN) CORP;TOSHIBA JOHO SYSTEM TECHNOLOGY KK 发明人 HONMA SOICHI;SUZUKI TSUNEO;YAMAMOTO TATSUYA
分类号 H03K5/08;H03K5/1532;H04L25/03;H04L27/06 主分类号 H03K5/08
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