| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a clock synchronization system which minimizes the influence of a queuing delay in a time period on clock synchronization accuracy. <P>SOLUTION: A slave node uses a packet periodically transmitted from a master node via a packet switched network (PSN) to synchronize a clock of the slave node to that of the master node. The slave node comprises a buffer, a maximum extracting section, a control section, and a VCO. The buffer temporarily stores received packets, that are transmitted from the master node, monitors and outputs a buffer accumulation amount and outputs data using a reproduction clock frequency of the slave node. The maximum extracting section extracts a maximum value for each time period from the buffer accumulation amount. The control section controls a control voltage such that the maximum values of the buffer accumulation amounts are held at a reference value. The VCO changes the reproduction clock frequency based on the control voltage received from the control section. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
