| 摘要 |
<P>PROBLEM TO BE SOLVED: To attain an ON/OFF control to an ODT circuit, without loading a new pin (port) or a function of a mode register on a RAM. Ž<P>SOLUTION: A semiconductor storage device is equipped with the RAM (random access memory) (10), the ODT (on die termination) circuit (30), and a JTAG (joint test action group) circuit (20). The RAM (10) is connected to a data input/output port (DQ). The ODT circuit (30) is arranged between the data input/output port (DQ) and a termination port (VTT). The JTAG circuit (20) controls the ODT circuit (30), in response to an instruction, so that the data input/output port (DQ) and the termination port (VTT) are connected to each other. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
|
