发明名称 INTER-PROCESSOR COMMUNICATION CONTROLLER
摘要 PROBLEM TO BE SOLVED: To solve the problem that in a system for transmitting/receiving data between a plurality of processors and performing signal processing, when a processor cannot execute processing at a timing designated in a time table, congestion occurs in the signal processing, so that throughput of the system is reduced. SOLUTION: When a delay occurs in a reception processor PU(RX) accessed from a plurality of processors for data communication, which shifts from communication processing to data processing, a monitoring processor SVP acquires network configuration information from a network configuration information generation/storage part equipped therein, specifies a transmission processor, updates the time table TBL, and distributes it to the transmission processor PU(TX) to improve the throughput. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009251732(A) 申请公布日期 2009.10.29
申请号 JP20080096157 申请日期 2008.04.02
申请人 MITSUBISHI ELECTRIC CORP 发明人 OFUJI KENICHI
分类号 G06F13/00 主分类号 G06F13/00
代理机构 代理人
主权项
地址