发明名称 COMPUTER ARCHITECTURE
摘要 A computer processor comprises a memory and logic and control circuitry utilizing instructions and operands used thereby. The logic and control circuitry includes: an execution buffer each location of which can contain an instruction or data together with a tag indicating the status of the information in the location; means for executing the instructions in the buffer in dependence on the statuses of the current instruction and the operands in the buffer used by that instruction, and a program counter for fetching instructions sequentially from the memory. The tags include data, instruction, reserved, and empty tags. The processor may to execute instructions as parallel tasks subject to their data dependencies and a system may include several such processors. FIGS. 2-5 show successive stages of the execution buffer in performing a short program.
申请公布号 US2009271790(A1) 申请公布日期 2009.10.29
申请号 US20070293290 申请日期 2007.03.19
申请人 发明人 WILLIAMS PAUL
分类号 G06F9/30;G06F9/46 主分类号 G06F9/30
代理机构 代理人
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