发明名称 CONFIGURABLE HYBRID ADDER CIRCUITRY
摘要 Hybrid adder circuitry is provided for integrated circuits such as programmable integrated circuits. The hybrid adder may combine the capabilities of multiple adder architectures. Hybrid adders may include carry select and carry ripple adder circuits. The adder circuits may be combined using a carry look-ahead architecture. Adder functionality may be implemented using the resources of logic regions on the programmable integrated circuits. Each logic region may include combinatorial logic such as look-up table logic and register circuitry. The hybrid adder circuitry may receive input words to be added from the combinatorial circuitry and may produce corresponding arithmetic sum output signals to the register circuitry.
申请公布号 US2009271465(A1) 申请公布日期 2009.10.29
申请号 US20080111156 申请日期 2008.04.28
申请人 PISTORIUS ERHARD JOACHIM;HUTTON MICHAEL D 发明人 PISTORIUS ERHARD JOACHIM;HUTTON MICHAEL D.
分类号 G06F7/485 主分类号 G06F7/485
代理机构 代理人
主权项
地址