发明名称 Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump
摘要 A new method and package is provided for the mounting of semiconductor devices that have been provided with small-pitch Input/Output interconnect bumps. Fine pitch solder bumps, consisting of pillar metal and a solder bump, are applied directly to the I/O pads of the semiconductor device, the device is then flip-chip bonded to a substrate. Dummy bumps may be provided for cases where the I/O pads of the device are arranged such that additional mechanical support for the device is required.
申请公布号 US2009267213(A1) 申请公布日期 2009.10.29
申请号 US20090384977 申请日期 2009.04.09
申请人 MEGICA CORPORATION 发明人 LIN MOU-SHIUNG;LEI MING-TA;LIN CHUEN-JYE
分类号 H01L23/488;H01L23/18 主分类号 H01L23/488
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