| 摘要 |
Digital memory devices and systems, as well as methods of operating digital memory devices, that include a multivalue memory cell with a first and a second gating transistor arranged in parallel, having a first and a second node, respectively, coupled to a storage element, and sensing circuitry coupled to a third and a fourth node of the first and second gating transistors, respectively, to sense a stored voltage of the memory cell. In embodiments, the first and second gating transistors are configured to activate at different threshold voltage levels.
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