发明名称 |
High performance stress-enhance MOSFET and method of manufacture |
摘要 |
The invention relates to a semiconductor structure and method of manufacturing and more particularly to a CMOS device with a stress inducing material embedded in both gates and also in the source/drain region of the PFET and varying thickness of the PFET and NFET channel. In one embodiment, the structure enhances the device performance by varying the thickness of the top Silicon layer respective to the NFET or the PFET.
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申请公布号 |
US7608489(B2) |
申请公布日期 |
2009.10.27 |
申请号 |
US20060380689 |
申请日期 |
2006.04.28 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHIDAMBARRAO DURESETI;DONATON RICARDO A.;HENSON WILLIAM K.;RIM KERN |
分类号 |
H01L21/8232;H01L21/335 |
主分类号 |
H01L21/8232 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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