发明名称 Method and apparatus for testing multi-core microprocessors
摘要 A computer implemented method, data processing system, and computer usable code are provided for testing multi-core microprocessors. A test process initiates testing on communication bus interfaces associated with a set of processor cores on the multiprocessor in which the communication bus interfaces are disabled and wherein the testing uses a set of isolation test sequences to obtain results. The process identifies a set of functional processor cores in the set of processor cores based upon the results. The process also initiates a ramp logic built-in self-test to test a ramp associated with a functional processor core in the set of functional processor cores, wherein the ramp logic built-in self-test determines if the communication bus interface associated with functional processor core in the set of functional processor cores is functional.
申请公布号 US7610537(B2) 申请公布日期 2009.10.27
申请号 US20060278615 申请日期 2006.04.04
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DICKINSON DAN JEFFREY;KENNEY ROBERT D.;NEWMAN-LABOUNTY CHRISTINA LYNNE;WALTHER RONALD GENE
分类号 G01R31/28;G06F11/00 主分类号 G01R31/28
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