发明名称 |
Implementing enhanced SRAM read performance sort ring oscillator (PSRO) |
摘要 |
A method and apparatus including a static random access memory (SRAM) cell implement an enhanced SRAM read performance sort ring oscillator (PSRO), and a design structure on which the subject circuit resides is provided. A pair of parallel reverse polarity connected inverters defines a static latch or cross-coupled memory cell. The SRAM cell includes independent left and right wordlines providing a respective gate input to a pair of access transistors used to access to the memory cell. The SRAM cell includes a voltage supply connection to one side of the static latch. For example, a complement side of the static latch is connected to the voltage supply. A plurality of the SRAM cells is assembled together to form a SRAM base block. A plurality of the SRAM base blocks is connected together to form the SRAM read PSRO.
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申请公布号 |
US7609542(B2) |
申请公布日期 |
2009.10.27 |
申请号 |
US20070873534 |
申请日期 |
2007.10.17 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ADAMS CHAD ALLEN;CHRISTENSEN TODD ALAN;HEBIG TRAVIS REYNOLD;PETERSON KIRK DAVID |
分类号 |
G11C11/40 |
主分类号 |
G11C11/40 |
代理机构 |
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代理人 |
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