发明名称 Multi-layer semiconductor package
摘要 A semiconductor package comprises a base substrate with a semiconductor die mounted on a top side of the base substrate and an interposer substrate mounted on top of the die. The bottom side of the interposer substrate can be electrically coupled to the top side of the base substrate through vertical connectors. The top side of the interposer substrate is substantially exposed and comprises input/output (I/O) terminals for the mounting of additional electronic components. The base and interposer substrates can be configured with I/O terminals such that components mounted on the substrates can be electrically coupled through the vertical connectors. The base substrate also can be electrically coupled to an additional electronic component, such as a printed circuit board. Electrical connections can be "wrapped around" from the base substrate to the top of the interposer substrate. The vertical connectors can be positioned along multiple sides of the package, which can increase routing space between the substrates.
申请公布号 US7608921(B2) 申请公布日期 2009.10.27
申请号 US20060608164 申请日期 2006.12.07
申请人 STATS CHIPPAC, INC. 发明人 PENDSE RAJENDRA D.
分类号 H01L23/488;H01L21/56;H01L23/48 主分类号 H01L23/488
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