发明名称 MULTIPLE PATTERNING WIRING SUBSTRATE
摘要 <P>PROBLEM TO BE SOLVED: To provide a multiple patterning wiring substrate that reduces variation in thickness of a plated film for an aggregate. Ž<P>SOLUTION: A multiple patterning wiring substrate 10 includes a rectangular aggregate 12 in which two or more quadrangular individual pieces 11 adjoin in a short-side and a long-side direction respectively so that they form a matrix and a dummy part 13 in its peripheral portion, providing plated coatings with the conductive wiring pattern of the individual pieces 11 through a primary plating conductive wiring 14 disposed so as to surround the aggregate 12 and a secondary plating conductive wiring 15 connected to the primary plating conductive wiring and disposed so as to partition the individual pieces 11 into eyes of the "go" board, wherein the long-side directional length of the aggregate 12 as against its short-side directional length is 1.5 times longer or less, and it includes a primary plating current-supply conductive wiring 16 and a secondary plating current-supply conductive wiring 17 each connected approximately to the middle points of the short-side and long-side directional lengths of the primary plating conductive wiring 14 and installed so as to be extended to the dummy portion 13. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2009246066(A) 申请公布日期 2009.10.22
申请号 JP20080089231 申请日期 2008.03.31
申请人 SUMITOMO METAL ELECTRONICS DEVICES INC 发明人 SHIRAISHI KATSUHISA
分类号 H05K1/02 主分类号 H05K1/02
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