发明名称 PHASE TO DIGITAL CONVERTER IN ALL DIGITAL PHASE LOCKED LOOP
摘要 <p>A phase to digital converter, all digital phase locked loop, and apparatus having an all digital phase locked loop are described herein. The phase to digital converter includes a phase to frequency converter driving a time to digital converter. The time to digital converter determines a magnitude and sign of the phase differences output by the phase to frequency converter. The time to digital converter utilizes tapped delay lines and looped feedback counters to enable measurement of small timing differences typical of a loop tracking process and large timing differences typical of an loop acquisition process. The tapped delay lines permit the measurement of fractions of a reference period and enable lower power operation of the phase to digital converter by reducing requirements on the speed of the reference clock.</p>
申请公布号 WO2009129258(A1) 申请公布日期 2009.10.22
申请号 WO2009US40555 申请日期 2009.04.14
申请人 QUALCOMM INCORPORATED;ZHANG, GANG;JAJOO, ABISHEK;HAN, YIPING 发明人 ZHANG, GANG;JAJOO, ABISHEK;HAN, YIPING
分类号 H03L7/085 主分类号 H03L7/085
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