发明名称 SOI SUBSTRATE PRODUCING PROCESS
摘要 <P>PROBLEM TO BE SOLVED: To form a crystalline semiconductor layer reduced in thickness irregularities on a large-area substrate. Ž<P>SOLUTION: Embrittlement layers are formed in a plurality of semiconductor substrates at positions having different depths measured from the surfaces, a semiconductor substrate larger in depth measured from the surface to the embrittlement layer is disposed in a region larger in polishing amount of chemical mechanical polishing in a base substrate plane, a semiconductor substrate smaller in depth measured from the surface to the embrittlement layer is disposed in a region smaller in polishing amount of chemical mechanical polishing in the base substrate plane, the base substrate and the semiconductor substrate are joined, the base substrate is separated from the semiconductor substrate starting from the embrittlement layer to form a first semiconductor layer and the first semiconductor layer is polished with CMP to form a second semiconductor layer. Etching treatment may be used in place of CMP. In this case, the semiconductor layer larger in depth measured from the surface to the embrittlement layer is disposed in a region larger in etching rate. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2009246346(A) 申请公布日期 2009.10.22
申请号 JP20090049196 申请日期 2009.03.03
申请人 SEMICONDUCTOR ENERGY LAB CO LTD 发明人 SHIMOMURA AKIHISA
分类号 H01L21/02;G02F1/1368;H01L21/265;H01L21/304;H01L21/3065;H01L21/336;H01L27/08;H01L27/12;H01L29/786;H01L51/50;H05B33/02;H05B33/14 主分类号 H01L21/02
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