| 摘要 |
<p>A testing apparatus comprising a signal input portion for generating a predetermined test signal and supplying to a device under test, and a judgment portion for determining fail or pass of the device under test based on a response signal outputted from the device under test in response to the test signal, wherein the signal input portion has an operating circuit for operating to generate the test signal, and a power source stabilization circuit, provided within the same chip as the operating circuit, for stabilizing a power source voltage supplied to the operating circuit, and wherein the power source stabilization circuit has a high speed compensation section for compensating variations in the power source voltage supplied to the operating circuit at a given compensation speed, and a low speed compensation section for compensating variations in the power source voltage supplied to the operating circuit, at a compensation speed which is lower than that of the high speed compensation section.</p> |
