| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of achieving a reduced circuit scale and improving characteristics, by reducing parasitic capacity of a memory cell array. <P>SOLUTION: This semiconductor memory device is constructed in such a manner that a memory cell array formed by arraying a plurality of memory cells is divided into a plurality of groups 1a and 1b along at least one of a bit line direction and a word line direction, and individual source lines SL (a) and SL (b) are commonly connected for each group. <P>COPYRIGHT: (C)2010,JPO&INPIT |
