发明名称 LINE BUFFER CIRCUIT, IMAGE PROCESSING APPARATUS, AND IMAGE FORMING APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To provide a line buffer circuit which can perform a read operation and a write operation at high speed without increasing the circuit size. Ž<P>SOLUTION: When performing a data writing processing into a single port memory 65, data corresponding to a predetermined number of pixels that are packed by a data packing section 64, are written together into the single port memory 65. When performing data reading and processing from the single port memory 65, the data corresponding to predetermined number of pixels are read out together from the single port memory 65. After the data writing processing corresponding to a predetermined number of pixels into the single port memory 65 are performed, and before next data corresponding to the predetermined number of pixels that are to be written into the single port memory 65 are input, the data reading from the single port memory 65 is performed. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2009246488(A) 申请公布日期 2009.10.22
申请号 JP20080088029 申请日期 2008.03.28
申请人 SHARP CORP 发明人 ISHIKURA TOMOYA
分类号 H04N1/21;G06T1/60;H04N1/00 主分类号 H04N1/21
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