发明名称 Duty cycle correction circuit with wide-frequency working range
摘要 A duty cycle correction circuit with wide-frequency working range utilizes a pulse generator having adjustable pulse width function to adjust the width of the pulse and outputs a clock signal with the duty cycle of 50%. The pulse generator includes a NAND gate, a modulation device, and an inverter. The inverter is coupled between the second input end of the NAND gate and the modulation device. The modulation device modulates the low-level status of the input clock signal and accordingly outputs to the inverter. The first input end of the NAND gate receives the input clock signal. The NAND gate operates NAND calculation to the signals received on the input ends of the NAND gate and accordingly outputs a periodic low-level pulse signal.
申请公布号 US2009261877(A1) 申请公布日期 2009.10.22
申请号 US20080273557 申请日期 2008.11.19
申请人 HUANG HSIEN-SHENG;SHIAH CHUN 发明人 HUANG HSIEN-SHENG;SHIAH CHUN
分类号 H03K3/017;H03K7/08;H03L7/06 主分类号 H03K3/017
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