发明名称 High voltage CMOS output buffer constructed from low voltage CMOS transistors
摘要 A high voltage CMOS output buffer is constructed from low voltage CMOS transistors. The output buffer employs a series of unique CMOS inverter stages, each of which contains a switched PMOS transistor, one or more voltage drop blocks, and a switched NMOS transistor. The voltage drop blocks are composed of stacked PMOS transistors that are diode-connected-i.e., the PMOS gate terminal is connected to the PMOS drain terminal, and the PMOS body (N-well) terminal is connected to the PMOS source terminal. The diode-connected PMOS transistors reduce the voltage across the transistor gate oxide to a safe value, for all internal PMOS/NMOS transistors inside the CMOS output buffer.
申请公布号 US2009261865(A1) 申请公布日期 2009.10.22
申请号 US20080148224 申请日期 2008.04.17
申请人 PASQUALINI RONALD 发明人 PASQUALINI RONALD
分类号 H03K3/00 主分类号 H03K3/00
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