发明名称 Subtractor circuit and operational amplifier
摘要 Disclosed herein is a subtractor circuit for outputting an output voltage as a difference between a first input voltage and a second input voltage. The subtractor circuit may include a first semiconductor element, a second semiconductor element, a third semiconductor element, a fourth semiconductor element, a fifth semiconductor element, and a sixth semiconductor element configured to each invert a voltage input to an input terminal and output the inverted voltage from an output terminal; an input terminal of the first semiconductor element; an input terminal of the second semiconductor element; an output terminal of the first semiconductor element; and an output terminal of the third semiconductor element.
申请公布号 US7605634(B2) 申请公布日期 2009.10.20
申请号 US20070904026 申请日期 2007.09.25
申请人 SONY CORPORATION 发明人 HIRABAYASHI ATSUSHI
分类号 G06G7/12 主分类号 G06G7/12
代理机构 代理人
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