| 摘要 |
<P>PROBLEM TO BE SOLVED: To facilitate synchronization of flag data and the data while reducing current consumption during data transfer. Ž<P>SOLUTION: A semiconductor memory device includes: a first exclusive-OR circuit which compares mth N-bit first data with (m+1)th N-bit second data; a majority circuit which generates flag data to invert the second data if a comparison result of the first exclusive-OR circuit indicates that the number of mismatch bits between the first data and the second data is not less than N/2, and generates flag data to noninvert the second data if the number of mismatch bits between the first data and the second data is less than N/2; a second exclusive-OR circuit which inverts or noninverts the second data based on the flag data; a shift register which stores the flag data generated by the majority circuit; and a pad to serially output both the inverted or noninverted second data and the flag data. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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