| 摘要 |
One or more frame slots to each transceiver are allocated for communication within each message cycle. The number of frame slots allocated can be dynamically adjusted to accommodate variable traffic loads per transceiver, and an offset of the frame slots within the message cycle is preferably predefined to provide a uniform distribution among the transceivers. The design of the transceiver is independent of the particular application, having at least one programmable parameter that controls the number of frame slots allocated within the message cycle. By controlling the number of frame slots allocated to a transceiver, the amount of inactive time, and hence battery life, can be controlled. When a conflict occurs among multiple transceivers having pending messages at the same frame slot, the allocation of the frame slot to a transceiver is based at least in part on the resultant lag time to each transceiver.
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