| 摘要 |
PURPOSE: A low power shift register and semiconductor memory device including the same is provided to reduce the current consumption due to the toggling of the clock for a shift. CONSTITUTION: The semiconductor memory device includes the shifting part, the clock control part, the signal input part, and the latch unit and the controller. The shifting part shifts the input signal and outputs the output signal by synchronizing in the clock for a shift. The clock control part enables the clock for a shift in response to the input signal. The clock control part disables the clock for a shift in response to the output signal. The signal input part disables the clock enable signal in response to the output signal. The latch unit maintains the level of the clock enable signal. The controller disables the clock for a shift in response to the clock enable signal.
|
