| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a chip-size package compatible with miniaturization and low profile as well as simplifying a manufacturing process and permitting low-cost production, and to provide a method of manufacturing the same. Ž<P>SOLUTION: The chip-size package 100 is cut out of a semiconductor wafer Wa. In the package 100, the semiconductor wafer Wa has an SOI structure having a buried oxide film 21, a semiconductor device formation region S formed in the SOI layer 22 on the buried oxide film 21 on a semiconductor chip 20a is surrounded by a primary insulating trench T1 that reaches the buried oxide film 21, thus being insulated and isolated from ambiences, a protruding electrode D is formed on the SOI layer 22, a protective resin 24 covering the SOI layer 22 is formed such that the leading end of the protruding electrode D is exposed, and the semiconductor chip 20a is cut out at the outside of the primary insulating trench T1. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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