发明名称 TECHNIQUE FOR COMBINING IN-RUSH CURRENT LIMITING AND SHORT CIRCUIT CURRENT LIMITING
摘要 <p>A circuit that protects from high power-on in-rush currents and short circuits. The circuit has a pass transistor and a parallel smaller transistor. A comparator senses when an output voltage crosses a reference and turns off the pass transistor and turns on the parallel smaller transistor. The parallel smaller transistor has a higher "on" resistance so that the short circuit or the in-rush current does not harm the electronics. When the short circuit or in-rush current condition is removed, the comparator senses this condition and returns to the normal operation where the pass transistor is on and the parallel small transistor is off.</p>
申请公布号 WO2009126241(A1) 申请公布日期 2009.10.15
申请号 WO2009US02144 申请日期 2009.04.06
申请人 GARRETT, JAMES 发明人 GARRETT, JAMES
分类号 H02H9/00;H03K17/082 主分类号 H02H9/00
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