| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a memory controller device, a control method for the memory controller device and a data reception device for preventing deterioration in data transfer efficiency. <P>SOLUTION: A memory device 3 is connected to the memory controller device 2, and SDRAM 6a to 6h are mounted on the memory device 3. A memory controller part 4 and a physical layer part 5 are installed in the memory controller device 2, and data are read out of the SDRAM 6a to 6h in response to a read-out instruction from the memory controller part 4, and input to a data reception circuit 13 of the physical layer part 5. A delay circuit 11 applies a delay time DTCS to a terminating time TT so that all data arrival time can be included in the terminating time TT according to the value of a round trip time RTT. A data reception circuit keeps terminating resistors ODT1 and ODT2 on in the terminating time TT. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
