发明名称 SOFTWARE PIPELINING
摘要 A software pipelining method for generating a schedule for executing a plurality of instructions on a processor, the plurality of instructions involving one or more variables, the processor having one or more physical registers, the method comprising the step of scheduling each of the plurality of instructions, determining whether there is a variable for which there is less than a threshold number of physical registers to which that variable may be allocated, and unscheduling a currently scheduled instruction when there is a variable for which there is less than the threshold number of a physical registers to which that that variable may be allocated.
申请公布号 US2009260015(A1) 申请公布日期 2009.10.15
申请号 US20060280478 申请日期 2006.02.24
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 BATOG BOGDAN;BADEA DRAGOS
分类号 G06F9/46 主分类号 G06F9/46
代理机构 代理人
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