发明名称 |
Verfahren zum Bilden eines Gate-Kontakts in einer Halbleitervorrichtung |
摘要 |
A processing sequence for definition of gate contacts can be implemented using either a deep ultra-violet (DUV) or mid ultra-violet (MUV) positive resist processing and supports the use of a reticle that integrates contacts to various regions including gates, sources and drains of various devices. In a one example, the wafer is coated with a planarizing anti-reflective coating (ARC), which then supports imaging of gate contacts using a positive DUV or MUV resist. This processing allows the nitride cap of certain transistor gates to be replaced with an oxide. In this example, the ARC can serve as an etch guide for selective removal of a film. |
申请公布号 |
DE10334427(B4) |
申请公布日期 |
2009.10.15 |
申请号 |
DE2003134427 |
申请日期 |
2003.07.28 |
申请人 |
INFINEON TECHNOLOGIES RICHMOND LP |
发明人 |
DAVIS, JONATHAN PHILIP;GOODWIN, FRANCIS;RENNIE, MICHAEL |
分类号 |
H01L21/336;H01L21/768;H01L21/8234;H01L21/8239;H01L21/8242;H01L27/105;H01L27/108;H01L27/115 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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