| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a latch circuit capable of preventing the decline of a speed, preventing soft errors and improving reliability. Ž<P>SOLUTION: The latch circuit includes: four or more gates (101a-101d); three input terminals and one or two output terminals which are connected to at least one of the four or more gates; a feedback circuit in which respective input terminals of the four or more gates are connected to output terminals of at least another two of the four gates; and a data inverting gate which, when all data inputted into the three input terminals are the same, outputs inverted data of the data from the output terminals, and when all the data input into the three input terminals are not the same, retains previous data. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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