发明名称 SAMPLING CHIP ACTIVITY FOR REAL TIME POWER ESTIMATION
摘要 A system and method for real-time power estimation. A core may be divided into units. Each unit is simulated to achieve a real power consumption characterization. The power consumption is sampled. Statistical analysis is performed that assumes the core has node capacitance switching behavior that is approximated by a stationary random process with a Poisson distribution. The statistical analysis determines the number of samples to take during a sample interval. The operational frequency, sample interval, and number of samples are used to determine the number of signals to sample. Signals are chosen that have a high correlation with the node capacitance switching behavior, such as clock enable signals on the last stage of a clock distribution system. Weights with tuned values are assigned to each sampled signal. Sampling occurs during every predetermined number of clock cycles. The weights of asserted sampled signals are summed in order to determine a repeatable power estimation value.
申请公布号 US2009259869(A1) 申请公布日期 2009.10.15
申请号 US20080101598 申请日期 2008.04.11
申请人 NAFFZIGER SAMUEL D 发明人 NAFFZIGER SAMUEL D.
分类号 G06F11/30;G06F1/26 主分类号 G06F11/30
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