发明名称 |
Configuration and method of manufacturing the one-time programmable (OTP) memory cells |
摘要 |
This invention discloses an one time programmable (OTP) memory. The OTP memory includes a first and a second metal oxide semiconductor (MOS) transistors connected in parallel and controlled by a single polysilicon stripe functioning as a gate wherein the OTP memory further includes a drift region for counter doping a lightly dope drain (LDD) encompassing and surrounding a drain and a source of the first MOS transistor having a different threshold voltage than the second MOS transistor not reached by the drift region. In a preferred embodiment, the first and second MOS transistors are N-MOS transistors disposed in a common P-well and the drift region of the first MOS transistor further comprising a P-drift region.
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申请公布号 |
US7602029(B2) |
申请公布日期 |
2009.10.13 |
申请号 |
US20060518001 |
申请日期 |
2006.09.07 |
申请人 |
ALPHA & OMEGA SEMICONDUCTOR, LTD. |
发明人 |
MALLIKARARJUNASWAMY SHEKAR |
分类号 |
H01L29/72 |
主分类号 |
H01L29/72 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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