发明名称 Digital background correction of nonlinear error ADC's
摘要 The invention provides circuits and methods for estimating and correcting nonlinear error in analog to digital converters that is introduced by nonlinear circuit elements, for example one or more residue amplifiers in a pipelined analog to digital converter integrated circuit. In a preferred method of the invention, pseudo random calibration sequences are introduced into the digital signal to be converted by a flash digital to analog converter in one or more initial stages of the pipelined analog to digital converter circuit. A digital residue signal of the output of the one or more initial pipelined analog to digital converter stages is sampled. Intermodulation products of the pseudo random calibration sequences that are present in the digital residue signal are determined to estimate nonlinear error introduced by the residue amplifier in the one or more stages. A digital correction signal is provided to the output of the one or more stages to cancel estimated nonlinear error.
申请公布号 US7602323(B2) 申请公布日期 2009.10.13
申请号 US20080080820 申请日期 2008.04.04
申请人 THE REGENTS OF THE UNIVERSITY OF CALIFORNIA 发明人 GALTON IAN;PANIGADA ANDREA
分类号 H03M1/10 主分类号 H03M1/10
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