发明名称 |
Methods of Forming Dual-Damascene Metal Wiring Patterns for Integrated Circuit Devices and Wiring Patterns Formed Thereby |
摘要 |
Methods of forming dual-damascene metal wiring patterns include forming a first metal wiring pattern (e.g., copper wiring pattern) on an integrated circuit substrate and forming an etch-stop layer on the first metal wiring pattern. These steps are followed by the steps of forming an electrically insulating layer on the etch-stop layer and forming an inter-metal dielectric layer on the electrically insulating layer. The inter-metal dielectric layer and the electrically insulating layer are selectively etched in sequence to define an opening therein that exposes a first portion of the etch-stop layer. This opening may include a trench and a via hole extending downward from a bottom of the trench. A first barrier metal layer is formed on a sidewall of the opening and directly on the first portion of the etch-stop layer. A portion of the first barrier metal layer is selectively removed from the first portion of the etch-stop layer. The first portion of the etch-stop layer is then selectively etched for a sufficient duration to expose a portion of the first metal wiring pattern. A second metal wiring pattern is formed in the opening in order to complete a dual-damascene structure.
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申请公布号 |
US2009250429(A1) |
申请公布日期 |
2009.10.08 |
申请号 |
US20090485306 |
申请日期 |
2009.06.16 |
申请人 |
LEE BOUNG JU;SHIN HEON JONG;KANG HEE SUNG |
发明人 |
LEE BOUNG JU;SHIN HEON JONG;KANG HEE SUNG |
分类号 |
B44C1/22 |
主分类号 |
B44C1/22 |
代理机构 |
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