发明名称 SIGNAL PROCESSING APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To correct distortion in the duty cycle of a data signal in which occurrence probabilities of "0" and "1" are different. <P>SOLUTION: A phase detection circuit 21 detects advanced and delayed phases of a data signal in which occurrence probabilities of "0" and "1" are different. An AND circuit 43 detects rising of the data signal and an AND circuit 44 detects falling. A +DCD detection circuit 45 detects distortion at a plus side of duty cycle based on detection results of the phase detection circuit 21 and the AND circuits 43 and 44, and a -DCD detection circuit 46 detects distortion at a minus side of duty cycle. A duty adjustment circuit 12 adjusts the duty cycle based on detection results of the +DCD detection circuit 45 and the -DCD detection circuit 46, thereby correcting the distortion of duty cycle. The present invention may be applicable to e.g., a receiving apparatus that receives a data signal. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2009232366(A) 申请公布日期 2009.10.08
申请号 JP20080077787 申请日期 2008.03.25
申请人 SONY CORP 发明人 OSHIMA SATORU;SHIMIZU TATSUO;KAWABE AZUMA;KAKIOKA HIDENOBU
分类号 H03K5/00;G06F1/10;H03K5/19;H03K5/26 主分类号 H03K5/00
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