发明名称 |
HIGH-SPEED VIDEO SERIALIZER AND DESERIALIZER |
摘要 |
<p>A high-speed video serializer has an X bit parallel input bus and a Y bit parallel output bus, where X and Y are multiples of one another (e.g., 2). A multiplexer is connected between the input bus and the output bus and is operated such that a frequency of the signals on the output bus is a multiple of the frequency of the signals on the input bus. A circuit provides a clock signal substantially in sync with the signals on the output bus. A high speed video deserializer is also disclosed as are methods of operating the serializer and deserializer.</p> |
申请公布号 |
WO2009121186(A1) |
申请公布日期 |
2009.10.08 |
申请号 |
WO2009CA00434 |
申请日期 |
2009.04.03 |
申请人 |
CA;US;CA;CA |
发明人 |
SETYA, TARUN;SAMOILA, CRISITAN;KHODABANDEH, POUPAK |
分类号 |
H04N7/00;H03M9/00;H04N5/14;H04N7/167 |
主分类号 |
H04N7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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