| 摘要 |
<P>PROBLEM TO BE SOLVED: To keep the processing performance of processors from deteriorating even if there is a bug in a dedicated instruction. Ž<P>SOLUTION: An apparatus for synthesizing processors includes: an operation synthesizing unit 50 for generating register transfer level descriptions out of operation level descriptions; an accepting unit 20 for accepting the input of a first operation level description and a performance target; an extraction unit 30 for extracting functions that represent a process unassociated with any instruction interpretable by a processor from the first operation level description; an addition unit 40 for adding a new instruction associated with the process represented by the function selected from the extracted functions to the first operation level description, and creating a second operation level description; and an output unit 60 which, if a register transfer level description obtained by providing the second operation level description to the operation synthesizing unit 50 meets the performance target (a), outputs the register transfer level description obtained and which, if it does not meet the target (b), outputs another register transfer level description obtained by providing the first operation level description to the operation synthesizing unit 50. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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