发明名称 HETERO-JUNCTION BIPOLAR TRANSISTOR
摘要 <P>PROBLEM TO BE SOLVED: To provide an HBT capable of simultaneously improving both on-state resistance and a breakdown voltage in the state that a collector current is flowing. Ž<P>SOLUTION: The hetero-junction bipolar transistor includes an n-type GaAs sub collector layer 101, an InGaP collector layer 102 formed on the GaAs sub collector layer 101, an n-type GaAs collector layer 103 formed on the InGaP collector layer 102, a p-type GaAs base layer 104 formed on the GaAs collector layer 103, and an n-type GaAs emitter layer 105 formed on the GaAs base layer 104. The carrier density of the GaAs sub collector layer 101 is higher than that of the GaAs collector layer 103, and a p-type GaAs spacer layer 110 is inserted between the InGaP collector layer 102 and the GaAs sub collector layer 101. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2009231593(A) 申请公布日期 2009.10.08
申请号 JP20080076160 申请日期 2008.03.24
申请人 PANASONIC CORP 发明人 NOGOME MASANOBU
分类号 H01L21/331;H01L29/737 主分类号 H01L21/331
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