| 摘要 |
A vertical transistor of a semiconductor device has a channel area formed in a vertical direction to a semiconductor substrate. After semiconductor poles corresponding to the length of semiconductor channels and gate electrodes surrounding sidewalls of the semiconductor poles are formed, subsequent processes of forming silicon patterns corresponding to junction areas, etc. are performed. The gate electrodes support the semiconductor poles during these subsequent processes. The height of the semiconductor poles corresponding to the length of the channel is increased, yet the semiconductor poles do not collapse or incline since the gate electrodes support the semiconductor poles.
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