HARDWARE ENGINE TO DEMOD SIMO, MIMO, AND SDMA SIGNALS

摘要

An apparatus including a configurable demodulation architecture which includes a control module and a demodulation engine. The control module includes a set of one or more control fields. The demodulation engine includes a spatial whitening module, a Minimum Mean Square Estimation (MMSE) module, at least a first Maximal Ratio Combining (MRC) module, and at least one multiplexer. Further, the multiplexer is coupled to the instruction module and controlled based on the control fields to select at least one of the MMSE module or MRC module.