发明名称 VERIFICATION SUPPORT PROGRAM, RECORDING MEDIUM WITH THE PROGRAM RECORDED THEREIN, VERIFICATION SUPPORT APPARATUS, AND VERIFICATION SUPPORT METHOD
摘要 <P>PROBLEM TO BE SOLVED: To highly precisely perform the simulation of a system under design having a multiplex module, and to facilitate efficient debugging. Ž<P>SOLUTION: The circuit volume of a system under design is reduced by a circuit conversion involving the sharing of common parts in the large-scale system having the multiplex module. Thus, even large-scale systems can be mounted on hardware, such as a FPGA (field programmable gate array), enabling a reduction in verification time. Further, as the waveform of each signal can be referenced as verification results, efficient debugging by the user can be facilitated. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2009223661(A) 申请公布日期 2009.10.01
申请号 JP20080068049 申请日期 2008.03.17
申请人 FUJITSU LTD 发明人 KANAZAWA YUJI
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
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