发明名称 Multiple Layer Metal Integrated Circuits and Method for Fabricating Same
摘要 A method of fabricating a plurality of layers of metal on a substrate depositing a first layer of metal on the substrate; depositing a first layer of planarization material over the substrate and first layer of metal to a depth above the top of the first layer of metal; polishing the first layer of planarization material down to at least the top of the first layer of metal; and depositing a second layer of metal on the first layer of metal and the first layer of planarization material.
申请公布号 US2009243088(A1) 申请公布日期 2009.10.01
申请号 US20080057783 申请日期 2008.03.28
申请人 M/A-COM, INC. 发明人 GOODRICH JOEL LEE
分类号 H01L23/48;H01L21/4763 主分类号 H01L23/48
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