发明名称 SEMICONDUCTOR DEVICE, MEMORY DEVICE AND MEMORY MODULE HAVING DIGITAL INTERFACE
摘要 An object of the present invention is to reduce jitter dependent on data patterns by an interface receiver. Another object of the present invention is to provide an LSI capable of automatically adjusting a delay time for jitter reduction so as to be able to control its setting for each device. Since the jitter dependent on the data patterns can be expected according to how the previous state is being placed, the state of data received by the receiver is held, and the timing provided to fetch input data is adjusted according to the held state and the input data. As a control mechanism lying in the receiver, for determining a delay time dependent on the form of mounting, a driver transmits and receives pulse data set at one-cycle intervals and pulse data set at two-cycle intervals as test patterns. The receiver has an automatic control mechanism for determining a delay time optimal to a system from the difference between a rising time of each of pulses different in pulse width and its falling time.
申请公布号 US2009245424(A1) 申请公布日期 2009.10.01
申请号 US20090481798 申请日期 2009.06.10
申请人 ELPIDA MEMORY, INC. 发明人 OSAKA HIDEKI;NISHIO YOJI;FUNABA SEIJI;SHOJI KAZUYOSHI
分类号 H03K9/00 主分类号 H03K9/00
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