发明名称 ESD NETWORKS FOR SOLDER BUMP INTEGRATED CIRCUITS
摘要 <p>Semiconductor dice (100, 200) of integrated circuit chips are provided withsolder bump pads (130, 230) distributed over active areas of the dice to supply the I/O interconnects without including peripheral wire bond pads.The dice are further provided with protective ESD structures (140p/140i, 240p/240i) arranged in a network that includes ESD structures that extend into the interior areas of the dice. This allows the ESD structures to be placed proximate to respective power and ground connections, and positioned to reduce an average interconnect length between interior bump pads and the ESD structures relative to an average path length between the interior bump pads and the die peripheral area.</p>
申请公布号 WO2009118674(A1) 申请公布日期 2009.10.01
申请号 WO2009IB51187 申请日期 2009.03.20
申请人 NXP B.V.;CHARLON, OLIVIER;AKYLAS, VICTOR 发明人 CHARLON, OLIVIER;AKYLAS, VICTOR
分类号 H01L23/60;H01L23/58 主分类号 H01L23/60
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