| 摘要 |
A discrete-time phase lock loop (DTPLL) includes an analog section comprising a digital-to-analog converter (DAC) and an oscillator, operative to provide a clock signal based on an input from the DAC. The DTPLL also includes a digital signal processor (DSP). The DSP includes a loop controller state machine; a phase detector; a counter, operative to receive clock signals from the oscillator and to provide a count value to the phase detector; a divider, operative to receive a reference signal and to provide a reference pulse output to the phase detector; and a loop filter operative to provide a control effort value based on an output from the phase detector. Based on the phase error value, an output of the oscillator is changed to reduce the phase error to a steady state value.
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