| 摘要 |
<P>PROBLEM TO BE SOLVED: To execute cell continuous transition tests for memory circuits having different sizes by one BIST circuit, and to test memory circuits having memory cells which are not the power of 2 in total. <P>SOLUTION: An integrated circuit includes: a plurality of memory circuits 2 different in size of memory arrays, a cell continuous transition test processing part 5; a BIST circuit 3 outputting s test cell address 6, a transition direction specifying signal 7, an active signal; and adjusting circuits 4 which are provided for each memory circuit 2 and which replace the test cell address 6 in a region of the memory cell array or convert the active signal 8 into a non-execution state when the test cell address 6 output from the BIST circuit 3 corresponds to a virtual cell array being a region out of the range of the memory cell array. <P>COPYRIGHT: (C)2010,JPO&INPIT |
