发明名称 Data Processing Apparatus and Method of Verifying Programs
摘要 According to one embodiment, an information processing apparatus includes a plurality of execution modules, a system memory shared by the plurality or execution modules, and a scheduler which controls assignment of a plurality of basic modules to the plurality of execution modules in order to execute a program in parallel by the plurality of execution modules. The scheduler saves data items, which is to be input by the execution modules as input data items of the basic modules and is stored in the storage areas of the system memory, in other storage areas of the system memory before the basic modules are executed, and compares the data items stored in the storage areas of the system memory and accessed by the execution modules with the data items saved in the other storage areas of the system memory after the basic modules have been executed.
申请公布号 US2009249132(A1) 申请公布日期 2009.10.01
申请号 US20090397127 申请日期 2009.03.03
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SAKAI RYUJI
分类号 G06F11/08;G06F9/46 主分类号 G06F11/08
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